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lt3012 1 3012fd features applications description 250ma, 4v to 80v low dropout micropower linear regulator the lt ? 3012 is a high voltage, micropower low dropout linear regulator. the device is capable of supplying 250ma of output current with a dropout voltage of 400mv. designed for use in battery-powered or high voltage systems, the low quiescent current (40a operating and 1a in shutdown) makes the lt3012 an ideal choice. quiescent current is also well controlled in dropout. other features of the lt3012 include the ability to operate with very small output capacitors. the regulator is stable with only 3.3f on the output while most older devices require between 10f and 100f for stability. small ce- ramic capacitors can be used without any need for series resistance (esr) as is common with other regulators. internal protection circuitry includes reverse-battery protection, current limiting, thermal limiting and reverse current protection. the device is available with an adjustable output with a 1.24v reference voltage. the lt3012 regulator is available in the 16-lead tssop and 12 pin low pro? le (0.75mm) (4mm 3mm) dfn packages with an exposed pad for enhanced thermal handling capability. dropout voltage n wide input voltage range: 4v to 80v n low quiescent current: 40a n low dropout voltage: 400mv n output current: 250ma n no protection diodes needed n adjustable output from 1.24v to 60v n 1a quiescent current in shutdown n stable with 3.3f output capacitor n stable with aluminum, tantalum or ceramic capacitors n reverse-battery protection n no reverse current flow from output to input n thermal limiting n thermally enhanced 16-lead tssop and 12-pin (4mm 3mm) dfn packages n low current high voltage regulators n regulator for battery-powered systems n telecom applications n automotive applications 5v supply with shutdown typical application l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 1f v in 5.4v to80v 3012 ta01 v out 5v250ma v shdn <0.3v>2.0v output off on 3.3 f 750k249k in lt3012 shdn out adj gnd output current (ma) 0 250 300 400350 200 3012 ta02 200150 50 100 150 250 100 50 0 dropout voltage (mv) downloaded from: http:///
lt3012 2 3012fd absolute maximum ratings (note 1) pin configuration lead free finish tape and reel part marking package description temperature range lt3012ede#pbf lt3012ede#trpbf 3012 12-lead (4mm 3mm) plastic dfn C40c to 125c lt3012efe#pbf lt3012efe#trpbf 3012efe 16-lead plastic tssop C40c to 125c lt3012hfe#pbf lt3012hfe#trpbf 3012hfe 16-lead plastic tssop C40c to 140c lead based finish tape and reel part marking package description temperature range lt3012ede lt3012ede#tr 3012 12-lead (4mm 3mm) plastic dfn C40c to 125c lt3012efe lt3012efe#tr 3012efe 16-lead plastic tssop C40c to 125c lt3012hfe lt3012hfe#tr 3012hfe 16-lead plastic tssop C40c to 140c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ 1211 10 98 7 13 12 3 4 5 6 ncin in nc shdn nc nc outout adj gnd nc top view de package 12-lead (4mm 3mm) plastic dfn t jmax = 125c, ja = 40c/w, jc = 16c/w exposed pad (pin 13) is gnd, must be soldered to pcb fe package 16-lead plastic tssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 17 gnd nc outout adj gnd nc gnd gndnc in in nc shdn nc gnd t jmax = 140c, ja = 40c/w, jc = 16c/w exposed pad (pin 17) is gnd, must be soldered to pcb order information in pin voltage .........................................................80v out pin voltage ......................................................60v in to out differential voltage .................................80v adj pin voltage ........................................................7v shdn pin input voltage ..........................................80v output short-circuit duration .......................... inde? nite storage temperature range tssop package ................................. C65c to 150c dfn package ...................................... C65c to 125c operating junction temperature range (notes 3, 10, 11) lt3012e ............................................. C40c to 125c lt3012hfe ......................................... C40c to 140c lead temperature (fe16 soldering, 10 sec) ......... 300c downloaded from: http:///
lt3012 3 3012fd electrical characteristics parameter conditions min typ max units minimum input voltage i load = 250ma l 4 4.75 v adj pin voltage (notes 2, 3) v in = 4v, i load = 1ma 4.75v < v in < 80v, 1ma < i load < 250ma l 1.225 1.2 1.241.24 1.255 1.28 vv line regulation v in = 4v to 80v, i load = 1ma (note 2) l 0.1 5 mv load regulation (note 2) v in = 4.75v, i load = 1ma to 250ma v in = 4.75v, i load = 1ma to 250ma l 71 2 25 mvmv dropout voltage v in = v out(nominal) (notes 4, 5) i load = 10ma i load = 10ma l 160 230 300 mvmv i load = 50ma i load = 50ma l 250 340 420 mvmv i load = 250ma i load = 250ma l 400 490 620 mvmv gnd pin currentv in = 4.75v (notes 4, 6) i load = 0ma i load = 100ma i load = 250ma ll 40 3 10 100 18 a mama output voltage noise c out = 10f, i load = 250ma, bw = 10hz to 100khz 100 v rms adj pin bias current (note 7) 30 100 na shutdown threshold v out = off to on v out = on to off ll 0.3 1.30.8 2v v shdn pin current (note 8) v shdn = 0v v shdn = 6v 0.30.1 21 aa quiescent current in shutdown v in = 6v, v shdn = 0v 1 5 a ripple rejection v in = 7v(avg), v ripple = 0.5v p-p, f ripple = 120hz, i load = 250ma 65 75 db current limit v in = 7v, v out = 0v v in = 4.75v, v out = C0.1v (note 2) l 250 400 ma ma reverse output current (note 9) v out = 1.24v, v in < 1.24v (note 2) 12 25 a the l denotes the speci? cations which apply over the C40c to 125c operating temperature range, otherwise speci? cations are at t j = 25c. (lt3012e) electrical characteristics parameter conditions min typ max units minimum input voltage i load = 200ma l 4 4.75 v adj pin voltage (notes 2, 3) v in = 4v, i load = 1ma 4.75v < v in < 80v, 1ma < i load < 200ma l 1.225 1.2 1.241.24 1.255 1.28 vv line regulation v in = 4v to 80v, i load = 1ma (note 2) l 0.1 5 mv load regulation (note 2) v in = 4.75v, i load = 1ma to 200ma v in = 4.75v, i load = 1ma to 200ma l 61 2 30 mvmv dropout voltage v in = v out(nominal) (notes 4, 5) i load = 10ma i load = 10ma l 160 230 320 mvmv i load = 50ma i load = 50ma l 250 340 450 mvmv i load = 200ma i load = 200ma l 360 490 630 mvmv gnd pin currentv in = 4.75v (notes 4, 6) i load = 0ma i load = 100ma i load = 200ma ll 40 37 110 18 a mama the l denotes the speci? cations which apply over the C40c to 140c operating temperature range, otherwise speci? cations are at t j = 25c. (lt3012h) downloaded from: http:///
lt3012 4 3012fd parameter conditions min typ max units output voltage noise c out = 10f, i load = 200ma, bw = 10hz to 100khz 100 v rms adj pin bias current (note 7) 30 100 na shutdown threshold v out = off to on v out = on to off ll 0.3 1.30.8 2v v shdn pin current (note 8) v shdn = 0v v shdn = 6v 0.30.1 21 aa quiescent current in shutdown v in = 6v, v shdn = 0v 1 5 a ripple rejection v in = 7v(avg), v ripple = 0.5v p-p , f ripple = 120hz, i load = 200ma 65 75 db current limit v in = 7v, v out = 0v v in = 4.75v, v out = C0.1v (note 2) l 200 400 ma ma reverse output current (note 9) v out = 1.24v, v in < 1.24v (note 2) 12 25 a electrical characteristics the l denotes the speci? cations which apply over the C40c to 140c operating temperature range, otherwise speci? cations are at t j = 25c. (lt3012h) note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3012 is tested and speci? ed for these conditions with the adj pin connected to the out pin.note 3: operating conditions are limited by maximum junction temperature. the regulated output voltage speci? cation will not apply for all possible combinations of input voltage and output current. when operating at maximum input voltage, the output current range must be limited. when operating at maximum output current, the input voltage range must be limited. note 4: to satisfy requirements for minimum input voltage, the lt3012 is tested and speci? ed for these conditions with an external resistor divider (249k bottom, 649k top) for an output voltage of 4.5v. the external resistor divider will add a 5a dc load on the output. note 5: dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a speci? ed output current. in dropout, the output voltage will be equal to (v in C v dropout ). note 6: gnd pin current is tested with v in = 4.75v and a current source load. this means the device is tested while operating close to its dropout region. this is the worst-case gnd pin current. the gnd pin current will decrease slightly at higher input voltages. note 7: adj pin bias current ? ows into the adj pin. note 8: shdn pin current ? ows out of the shdn pin. note 9: reverse output current is tested with the in pin grounded and the out pin forced to the rated output voltage. this current ? ows into the out pin and out the gnd pin. note 10: the lt3012e is guaranteed to meet performance speci? cations from 0c to 125c operating junction temperature. speci? cations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3012h is tested to the lt3012h electrical characteristics table at 140c operating junction temperature. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 11: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c (lt3012e) or 140c (lt3012h) when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. downloaded from: http:///
lt3012 5 3012fd typical performance characteristics typical dropout voltage guaranteed dropout voltage dropout voltage quiescent current adj pin voltage quiescent current quiescent current gnd pin current gnd pin current output current (ma) 0 dropout voltage (mv) 300 400 600500 3012 g01 200100 0 100 50 200 150 250 t j = 125c t j = 25c output current (ma) 0 guaranteed dropout voltage (mv) 200 400 600100 300 500 100 200 3012 g02 250 50 0 150 = test points t j 125c t j 25c temperature (c) C50 0 dropout voltage (mv) 200 600500 0 50 75 3012 g03 100 400300 C25 25 100 150 125 i l = 50ma i l = 10ma i l = 250ma i l = 100ma i l = 1ma 0 40 100 20 8060 10 5030 9070 C50 0 50 75 C25 25 100 150 125 temperature (c) quiescent current (a) 3012 g04 v shdn = v in v shdn = gnd v in = 6v r l = i l = 0 temperature (c) adj pin voltage (v) 1.255 3012 g05 1.240 1.230 1.2251.220 1.2601.250 1.245 1.235 i l = 1ma C50 0 50 75 C25 25 100 150 125 input voltage (v) 0 quiescent current (a) 40 60 80 8 3012 g06 2010 30 50 70 0 2 1 4 3 67 9 5 10 t j = 25c r l = v out = 1.24v v shdn = v in v shdn = gnd input voltage (v) 0 quiescent current(a) 150 200 250 80 3012 g07 100 50 125 175 225 7525 0 20 10 40 30 60 70 50 t j = 25c r l = v out = 1.24v v shdn = v in v shdn = gnd input voltage (v) 0 gnd pin current (ma) 1.2 8 3012 g08 0.80.4 1.00.6 0.2 0 2 1 4 3 67 9 5 10 t j = 25c *for v out = 1.24v r l = 49.6 i l = 25ma* r l = 124 i l = 10ma* r l = 1.24k i l = 1ma* input voltage (v) 0 gnd pin current (ma) 6 8 10 8 3012 g09 42 5 7 93 1 0 2 1 4 3 67 9 5 10 t j = 25c, *for v out = 1.24v r l = 4.96 i l = 250ma* r l = 12.4 i l = 100ma* r l = 24.8, i l = 50ma* downloaded from: http:///
lt3012 6 3012fd typical performance characteristics gnd pin current vs i load shdn pin threshold shdn pin current shdn pin current adj pin bias current current limit current limit reverse output current reverse output current load current (ma) 0 gnd pin current (ma) 6 8 10 3012 g10 42 5 7 93 1 0 100 50 200 150 250 v in = 4.75v t j = 25c v out = 1.24v temperature (c) shdn pin threshold (v) 1.4 3012 g11 0.80.4 0.2 0 2.01.8 1.6 1.2 1.0 0.6 C50 0 50 75 C25 25 100 150 125 off-to-on on-to-off shdn pin voltage (v) 0 shdn pin current (a) 0.2 0.4 0.60.1 0.3 0.5 1.0 2.0 3012 g12 3.0 0.5 0 1.5 2.5 t j = 25c current flowsout of shdn pin temperature (c) shdn pin current ( a) 3012 g13 0.40.2 0.1 0 0.60.5 0.3 C50 0 50 75 C25 25 100 150 125 v in = 6v v shdn = 0v current flowsout of shdn pin temperature (c) adj pin bias current (na) 3012 g14 100 8020 40 60 0 120 C50 0 50 75 C25 25 100 150 125 input voltage (v) 0 current limit (ma) 600 800 1000 3012 g15 400200 500 700 900300 100 0 20 10 40 30 60 70 50 80 t j = 25c t j = 125c v out = 0v temperature (c) 0 current limit (ma) 3012 g16 600400 200 500 700300 100 C50 0 50 75 C25 25 100 150 125 v in = 7v v out = 0v output voltage (v) 0 reverse output current (a) 120 160 200 8 3012 g17 8040 100 140 180 6020 0 2 1 4 3 67 9 5 10 t j = 25c v in = 0v v out = v adj current flowsinto output pin adj pin clamp (see applications information) temperature (c) reverse output current (a) 3012 g18 C50 0 50 75 C25 25 100 150 125 v in = 0v v out = v adj = 1.24v 100 8020 40 60 0 120 downloaded from: http:///
lt3012 7 3012fd typical performance characteristics input ripple rejection input ripple rejection minimum input voltage output noise spectral density 10hz to 100khz output noise transient response load regulation temperature (c) 60 ripple rejection (db) 68 9280 84 88 3012 g19 64 7672 C50 0 50 75 C25 25 100 150 125 v in = 4.75v + 0.5v p-p ripple at f = 120hz i l = 250ma v out = 1.24v temperature (c) minimum input voltage (v) 4.0 3012 g21 2.0 1.0 0.5 0 5.03.5 4.53.0 2.5 1.5 C50 0 50 75 C25 25 100 150 125 i load = 250ma frequency (hz) 10 40 ripple rejection (db) 50 60 70 80 100 1k 10k 100k 1m 3012 g20 30 2010 0 90 100 v in = 4.75v + 50mv rms ripple i load = 250ma c out = 10f c out = 3.3f temperature (c) load regulation (mv) C4 C2 3012 g22 C12C16 C18 C20 0 C8 C6 C10C14 C50 0 50 75 C25 25 100 150 125 i l = 1ma to 250ma frequency (hz) 0.1 output noise spectral density (v/ hz ) 1 10 1k 10k 100k 3012 g23 0.01 100 10 c out = 3.3f i load = 250ma v out 100v/div c out = 10f i l = 250ma v out = 1.24v 1ms/div 3012 g24 time (s) 0 output voltage deviation (v) load current (ma) C0.05 0.05 400 3012 g25 100 C0.10C0.15 0 0.10 0.15 200 300 0 100 200 300 500 v in = 6v v out = 5v c in = 3.3f ceramic c out = 3.3f ceramic i load = 100ma to 200ma downloaded from: http:///
lt3012 8 3012fd pin functions nc (pins 1, 6, 7, 9, 12)/(pins 2, 7, 10, 12, 15): no con- nect. these pins have no internal connection; connecting nc pins to a copper area for heat dissipation provides a small improvement in thermal performance. out (pins 2, 3)/(pins 3, 4): output.the output supplies power to the load. a minimum output capacitor of 3.3f is required to prevent oscillations. larger output capaci- tors will be required for applications with large transient loads to limit peak voltage transients. see the applications information section for more information on output ca- pacitance and reverse output characteristics. adj (pin 4)/(pin 5): adjust. this is the input to the error ampli? er. this pin is internally clamped to 7v. it has a bias current of 30na which ? ows into the pin (see curve of adj pin bias current vs temperature in the typical performance characteristics). the adj pin voltage is 1.24v referenced to ground, and the output voltage range is 1.24v to 60v. gnd (pins 5, 13)/(pins 1, 6, 8, 9, 16, 17): ground. the exposed backside of the package is an electrical connection for gnd. as such, to ensure optimum device operation and thermal performance, the exposed pad must be connected directly to pin 5/pin 6 on the pc board. shdn (pin 8)/(pin 11): shutdown. the shdn pin is used to put the lt3012 into a low power shutdown state. the output will be off when the ? shdn pin is pulled low. the shdn pin can be driven either by 5v logic or open-collector logic with a pull-up resistor. the pull-up resistor is only required to supply the pull-up current of the open-collec- tor gate, normally several microamperes. if unused, the shdn pin must be tied to a logic high or to v in . in (pins 10, 11)/(pins 13,14): input. power is supplied to the device through the in pin. a bypass capacitor is required on this pin if the device is more than six inches away from the main input ? lter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 1f to 10f is suf? cient. the lt3012 is designed to withstand reverse voltages on the in pin with respect to ground and the out pin. in the case of a reversed input, which can happen if a battery is plugged in backwards, the lt3012 will act as if there is a diode in series with its input. there will be no reverse current ? ow into the lt3012 and no reverse volt- age will appear at the load. the device will protect both itself and the load. (dfn package/tssop package) the lt3012 is a 250ma high voltage low dropout regula- tor with micropower quiescent current and shutdown. the device is capable of supplying 250ma at a dropout voltage of 400mv. the low operating quiescent current (40a) drops to 1a in shutdown. in addition to the low quiescent current, the lt3012 incorporates several protection features which make it ideal for use in bat- tery-powered systems. the device is protected against both reverse input and reverse output voltages. in battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the lt3012 acts like it has a diode in series with its output and prevents reverse current ? ow. adjustable operation the lt3012 has an output voltage range of 1.24v to 60v. the output voltage is set by the ratio of two external resis- tors as shown in figure 1. the device servos the output to maintain the voltage at the adjust pin at 1.24v referenced to ground. the current in r1 is then equal to 1.24v/r1 and the current in r2 is the current in r1 plus the adj pin bias current. the adj pin bias current, 30na at 25c, ? ows through r2 into the adj pin. the output voltage can be calculated using the formula in figure 1. the value of r1 should be less than 250k to minimize errors in the output voltage caused by the adj pin bias current. note that in shutdown the output is turned off and the divider current will be zero. applications information downloaded from: http:///
lt3012 9 3012fd applications information the adjustable device is tested and speci? ed with the adj pin tied to the out pin and a 5a dc load (unless otherwise speci? ed) for an output voltage of 1.24v. speci- ? cations for output voltages greater than 1.24v will be proportional to the ratio of the desired output voltage to 1.24v; (v out /1.24v). for example, load regulation for an output current change of 1ma to 250ma is C7mv typical atv out = 1.24v. at v out = 12v, load regulation is: (12v/1.24v) ? (C7mv) = C68mv output capacitance and transient response the lt3012 is designed to be stable with a wide range of output capacitors. the esr of the output capacitor affects stability, most notably with small capacitors. a minimum output capacitor of 3.3f with an esr of 3 or less is recommended to prevent oscillations. the lt3012 is a micropower device and output transient response will be a function of output capacitance. larger values of output capacitance decrease the peak deviations and provide figure 1. adjustable operation improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt3012, will increase the effective output capacitor value. extra consideration must be given to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are speci? ed with eia temperature char- acteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coef? cients as shown in figures 2 and 3. when used with a 5v regulator, a 16v 10f y5v capacitor can exhibit an effective value as low as 1f to 2f for the dc bias voltage applied and over the operating tempera- ture range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is avail- able in higher values. care still must be exercised when using x5r and x7r capacitors; the x5r and x7r codes only specify operating temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than y5v and z5u capacitors, but can still be signi? cant enough to drop capacitor values below appropriate levels. capaci-tor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be veri? ed. figure 2. ceramic capacitor dc bias characteristics figure 3. ceramic capacitor temperature characteristics v in 3012 f01 v out r2r1 + r2r1 v out = 1.24v v adj = 1.24v i adj = 30na at 25c output range = 1.24v to 60v + (i adj )(r2) 1 + in lt3012 out adj gnd dc bias voltage (v) change in value (%) 3012 f02 20 0 C20C40 C60 C80 C100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v,1210 case size, 10f temperature (c) C50 4020 0 C20C40 C60 C80 C100 25 75 3012 f03 C25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v,1210 case size, 10f downloaded from: http:///
lt3012 10 3012fd applications information voltage and temperature coef? cients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, simi- lar to the way a piezoelectric accelerometer or microphone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. current limit and safe operating area protection like many ic power regulators, the lt3012 has safe oper- ating area protection. the safe operating area protection decreases the current limit as the input voltage increases and keeps the power transistor in a safe operating region. the protection is designed to provide some output current at all values of input voltage up to the device breakdown (see curve of current limit vs input voltage in the typical performance characteristics). the lt3012 is limited for operating conditions by maximum junction temperature. while operating at maximum input voltage, the output current range must be limited; when operating at maximum output current, the input voltage range must be limited. device speci? cations will not apply for all possible combinations of input voltage and output current. operating the lt3012 beyond the maximum junc- tion temperature rating may impair the life of the device. thermal considerations the power handling capability of the device will be limited by the maximum rated junction temperature of (125c for lt3012e, or 140c for lt3012hfe). the power dissipated by the device will be made up of two components: 1. output current multiplied by the input/output voltage differential: i out ? (v in C v out ) and, 2. gnd pin current multiplied by the input voltage: i gnd ? v in . the gnd pin current can be found by examining the gnd pin current curves in the typical performance character- istics. power dissipation will be equal to the sum of the two components listed above. the lt3012 has internal thermal limiting designed to pro- tect the device during overload conditions. for continuous normal conditions the maximum junction temperature rating of 125c (e-grade) or 140c (h-grade)must not be exceeded. it is important to give careful consideration to all sources of thermal resistance from junction to ambi- ent. additional heat sources mounted nearby must also be considered. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes can also be used to spread the heat gener- ated by power devices. the following tables list thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 3/32" fr-4 board with one ounce copper. table 1. dfn measured thermal resistance copper area topside board area thermal resistance (junction-to-ambient) 2500 sq mm 2500 sq mm 40c/w 1000 sq mm 2500 sq mm 45c/w 225 sq mm 2500 sq mm 50c/w 100 sq mm 2500 sq mm 62c/w table 2. tssop measured thermal resistance copper area topside board area thermal resistance (junction-to-ambient) 2500 sq mm 2500 sq mm 40c/w 1000 sq mm 2500 sq mm 45c/w 225 sq mm 2500 sq mm 50c/w 100 sq mm 2500 sq mm 62c/w the thermal resistance junction-to-case ( jc ), measured at the exposed pad on the back of the die, is 16c/w. continuous operation at large input/output voltage dif- ferentials and maximum load current is not practical due to thermal limitations. transient operation at high input/output differentials is possible. the approximate thermal time constant for a 2500sq mm 3/32" fr-4 board with maximum topside and backside area for one ounce copper is 3 seconds. this time constant will increase as more thermal mass is added (i.e., vias, larger board, and other components). downloaded from: http:///
lt3012 11 3012fd for an application with transient high power peaks, average power dissipation can be used for junction temperature calculations as long as the pulse period is signi? cantly less than the thermal time constant of the device and board. calculating junction temperature example 1: given an output voltage of 5v, an input volt- age range of 24v to 30v, an output current range of 0ma to 50ma, and a maximum ambient temperature of 50c, what will the maximum junction temperature be? the power dissipated by the device will be equal to: i out(max) ? (v in(max) C v out ) + (i gnd ? v in(max) ) where: i out(max) = 50ma v in(max) = 30v i gnd at (i out = 50ma, v in = 30v) = 1ma so: p = 50ma ? (30v C 5v) + (1ma ? 30v) = 1.28w the thermal resistance will be in the range of 40c/w to 62c/w depending on the copper area. so the junction temperature rise above ambient will be approximately equal to: 1.31w ? 50c/w = 65.5c the maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: t jmax = 50c + 65.5c = 115.5c example 2: given an output voltage of 5v, an input voltage of 48v that rises to 72v for 5ms(max) out of every 100ms, and a 5ma load that steps to 50ma for 50ms out of every 250ms, what is the junction temperature rise above ambi- ent? using a 500ms period (well under the time constant of the board), power dissipation is as follows: p1(48v in, 5ma load) = 5ma ? (48v C 5v) + (200a ? 48v) = 0.23w p2(48v in, 50ma load) = 50ma ? (48v C 5v) + (1ma ? 48v) = 2.20w applications information p3(72v in, 5ma load) = 5ma ? (72v C 5v) + (200a ? 72v) = 0.35w p4(72v in, 50ma load) = 50ma ? (72v C 5v) + (1ma ? 72v) = 3.42w operation at the different power levels is as follows: 76% operation at p1, 19% for p2, 4% for p3, and 1% for p4. p eff = 76%(0.23w) + 19%(2.20w) + 4%(0.35w) + 1%(3.42w) = 0.64w with a thermal resistance in the range of 40c/w to 62c/w, this translates to a junction temperature rise above ambient of 26c to 38c. high temperature operation care must be taken when designing lt3012 applications to operate at high ambient temperatures. the lt3012 works at elevated temperatures but erratic operation can occur due to unforeseen variations in external components. some tantalum capacitors are available for high temperature operation, but esr is often several ohms; capacitor esr above 3 is unsuitable for use with the lt3012. ceramic capacitor manufacturers (murata, avx, tdk, and vishay vitramon at this writing) now offer ceramic capacitors that are rated to 150c using an x8r dielectric. device instability will occur if output capacitor value and esr are outside design limits at elevated temperature and operating dc voltage bias (see information on capacitor characteristics under output capacitance and transient response). check each passive component for absolute value and voltage ratings over the operating temperature range. leakages in capacitors or from solder ? ux left after insuficient board cleaning adversely affects lowquiescent current operation. the output voltage resistor divider should use a maximum bottom resistor value of 124k to compensate for high temperature leakage, setting divider current to 10a. consider junction temperature increase due to power dissipation in both the junction and nearby components to ensure maximum speci? cations are not violated for the device or external components. downloaded from: http:///
lt3012 12 3012fd applications information protection features the lt3012 incorporates several protection features which make it ideal for use in battery-powered circuits. in ad- dition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse-input volt- ages, and reverse voltages from output to input. like many ic power regulators, the lt3012 has safe operat- ing area protection. the safe area protection decreases the current limit as input voltage increases and keeps the power transistor inside a safe operating region for all values of input voltage. the protection is designed to provide some output current at all values of input voltage up to the device breakdown. the soa protection circuitry for the lt3012 uses a current generated when the input voltage exceeds 25v to decrease current limit. this current shows up as additional quiescent current for input voltages above 25v. this increase in quiescent current occurs both in normal operation and in shutdown (see curve of quiescent current in the typical performance characteristics). current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. for normal opera- tion, the junction temperature should not exceed 125c (lt3012e) or 140c (lt3012hfe). the input of the device will withstand reverse voltages of 80v. no negative voltage will appear at the output. the device will protect both itself and the load. this provides protection against batteries which can be plugged in backward. the adj pin of the device can be pulled above or below ground by as much as 7v without damaging the device. if the input is left open circuit or grounded, the adj pin will act like an open circuit when pulled below ground, and like a large resistor (typically 100k) in series with a diode when pulled above ground. if the input is powered by a voltage source, pulling the adj pin below the refer- ence voltage will cause the device to current limit. this will cause the output to go to a unregulated high voltage. pulling the adj pin above the reference voltage will turn off all output current. in situations where the adj pin is connected to a resistor divider that would pull the adj pin above its 7v clamp volt- age if the output is pulled high, the adj pin input current must be limited to less than 5ma. for example, a resistor divider is used to provide a regulated 1.5v output from the 1.24v reference when the output is forced to 60v. the top resistor of the resistor divider must be chosen to limit the current into the adj pin to less than 5ma when the adj pin is at 7v. the 53v difference between the out and adj pins divided by the 5ma maximum current into the adj pin yields a minimum top resistor value of 10.6k. in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. current ? ow back into the output will follow the curve shown in figure 4. the rise in reverse output current above 7v occurs from the breakdown of the 7v clamp on the adj pin. with a resistor divider on the regulator output, this current will be reduced depending on the size of the resistor divider. figure 4. reverse output current when the in pin of the lt3012 is forced below the out pin or the out pin is pulled above the in pin, input cur- rent will typically drop to less than 2a. this can happen if the input of the lt3012 is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. the state of the shdn pin will have no effect on the reverse output current when the output is pulled above the input. output voltage (v) 0 reverse output current (a) 120 160 200 8 3012 f04 8040 100 140 180 6020 0 2 1 4 3 67 9 5 10 adj pin clamp (see above) t j = 25c v in = 0v v out = v adj current flowsinto output pin downloaded from: http:///
lt3012 13 3012fd 5v buck converter with low current keep alive backup typical applications buck converter ef? ciency vs load current boost v in 6 210 12 d110mq060n r115.4k v out 5v1a/250ma 4 1 1411 35 1514 11 c c 1nf for input voltages below 7.5v, some restrictions may apply increase l1 to 30h for load currents above 0.6a and to 60h above 1a 1, 8, 9, 16 lt1766 shdnsync sw bias fb v c gnd c20.33f c1100f 10v solid tantalum l1 ? 15h d2 d1n914 r24.99k 3012 ta03 750k 249k c34.7f 100v ceramic v in 5.5v* to 60v + adj out in shdn lt3012 gnd operating current high low * ? load current (a) 0 efficiency (%) 80 90 100 1.00 3012 ta04 70 60 50 0.25 0.50 0.75 1.25 v in = 10v v in = 42v v out = 5v l = 68 h downloaded from: http:///
lt3012 14 3012fd lt3012 automotive application typical applications lt3012 telecom application constant brightness for indicator led over wide input voltage range + adj out in shdn lt3012 gnd on off 1f 3.3f 750k v in 12v (later 42v) load: clock, security system etc + C adj out in shdn lt3012 gnd on off 1f 3.3f v in 48v (72v transient) load: system monitor etc no protection diode needed! no protection diode needed! 3012 ta05 backup battery 249k 750k 249k in lt3012 shdn 1f return off on C48v out adj gnd 3012 ta06 3.3f r set i led = 1.24v/r set C48v can vary from C4v to C80v downloaded from: http:///
lt3012 15 3012fd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description de package 12-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1695) fe package 16-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation bb fe16 (bb) tssop 0204 0.09 ?0.20 (.0035 ?.0079) 0 ?8 0.25 ref 0.50 ?0.75 (.020 ?.030) 4.30 ?4.50* (.169 ?.177) 134 5 6 7 8 10 9 4.90 ?5.10* (.193 ?.201) 16 1514 13 12 11 1.10 (.0433) max 0.05 ?0.15 (.002 ?.006) 0.65 (.0256) bsc 2.94 (.116) 0.195 ?0.30 (.0077 ?.0118) typ 2 recommended solder pad layout 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 2.94 (.116) 3.58 (.141) 3.58 (.141) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc 4.00 0.10 (2 sides) 3.00 0.10 (2 sides) note:1. drawing proposed to be a variation of version (wged) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 1.70 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.50 ref 1 6 12 7 pin 1 notchr = 0.20 or 0.35 45 chamfer pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (ue12/de12) dfn 0806 rev d 2.50 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 2.20 0.05 0.70 0.05 3.60 0.05 packageoutline 3.30 0.10 0.25 0.05 0.50 bsc 1.70 0.05 3.30 0.05 0.50 bsc 0.25 0.05 downloaded from: http:///
lt3012 16 3012fd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2005 lt 0508 rev d printed in usa related parts part number description comments lt1020 125ma, micropower regulator and comparator v in : 4.5v to 36v, v out(min) = 2.5v, v do = 0.4v, i q = 40a, i sd = 40a, comparator and reference, class b outputs, s16, pdip14 packages lt1120/lt1120a 125ma, micropower regulator and comparator v in : 4.5v to 36v, v out(min) = 2.5v, v do = 0.4v, i q = 40a, i sd = 10a, comparator and reference, logic shutdown, ref sources and sinks 2/4ma, s8, n8 packages lt1121/lt1121hv 150ma, micropower, ldo v in : 4.2v to 30/36v, v out(min) = 3.75v, v do = 0.42v, i q = 30a, i sd = 16a, reverse battery protection, sot-223, s8, z packages lt1129 700ma, micropower, ldo v in : 4.2v to 30v, v out(min) = 3.75v, v do = 0.4v, i q = 50a, i sd = 16a, dd, s0t-223, s8,to220-5, tssop20 packages lt1676 60v, 440ma (i out ), 100khz, high ef? ciency step-down dc/dc converter v in : 7.4v to 60v, v out(min) = 1.24v, i q = 3.2ma, i sd = 2.5a, s8 package lt1761 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.3v, i q = 20a, i sd = <1a, low noise < 20v rms , stable with 1f ceramic capacitors, thinsot? package lt1762 150ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.3v, i q = 25a, i sd = <1a, low noise < 20v rms , ms8 package lt1763 500ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.3v, i q = 30a, i sd = <1a, low noise < 20v rms , s8 package lt1764/lt1764a 3a, low noise, fast transient response, ldo v in : 2.7v to 20v, v out(min) = 1.21v, v do = 0.34v, i q = 1ma, i sd = <1a, low noise < 40v rms , a version stable with ceramic capacitors, dd, to220-5 packages lt1766 60v, 1.2a (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.2v, i q = 2.5ma, i sd = 25a, tssop16/e package lt1776 40v, 550ma (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 7.4v to 40v, v out(min) = 1.24v, i q = 3.2ma, i sd = 30a, n8, s8 packages lt1934/lt1934-1 300ma/60ma, (i out ), constant off-time, high ef? ciency step-down dc/dc converter 90% ef? ciency, v in : 3.2v to 34v, v out(min) = 1.25v, i q = 14a, i sd = <1a, thinsot package lt1956 60v, 1.2a (i out ), 500khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.2v, i q = 2.5ma, i sd = 25a, tssop16/e package lt1962 300ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.27v, i q = 30a, i sd = <1a, low noise < 20v rms , ms8 package lt1963/lt1963a 1.5a, low noise, fast transient response, ldo v in : 2.1v to 20v, v out(min) = 1.21v, v do = 0.34v, i q = 1ma, i sd = <1a, low noise < 40v rms , a version stable with ceramic capacitors, dd, to220-5, s0t-223, s8 packages lt1964 200ma, low noise micropower, negative ldo v in : C1.9v to C20v, v out(min) = C1.21v, v do = 0.34v, i q = 30a, i sd = 3a, low noise < 30v rms , stable with ceramic capacitors, thinsot package lt3010/lt3010h 50ma, 3v to 80v, low noise micropower ldo v in : 3v to 8v, v out(min) = 1.275v, v do = 0.3v, i q = 30a, i sd = 1a, low noise < 100v rms , ms8e package, h grade = +140c t jmax . lt3013/lt3013h 250ma, 4v to 80v, low dropout micropower linear regulator with pwrgd v in : 4v to 80v, v out : 1.24v to 60v, v do = 0.4v, i q = 65a, i sd = <1a, power good feature; tssop-16e and 4mm 3mm dfn-12 packages, h grade = +140c t jmax . lt3014/hv 20ma, 3v to 80v, low dropout micropower linear regulator v in : 3v to 80v (100v for 2ms, hv version), v out : 1.22v to 60v, v do = 0.35v, i q = 7a, i sd = <1a, thinsot and 3mm 3mm dfn-8 packages. thinsot is a trademark of linear technology corporation. downloaded from: http:///

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